The present invention relates generally to image sensors and more particularly relates to image sensors using the light sensitive storage cells of a dynamic random access memory.
An image sensor is a transducer which is responsive to a light image for producing a signal or other indicia which to some extent characterizes or reproduces the light image. One type of image sensor which is now well-known, is the so-called vidicon tube. The vidicon tube is a vacuum tube which is responsive to light to produce electrical signals which reproduce the pattern of light impinging upon the vidicon. As technology has advanced, the vidicon tube has proven to be too bulky and too expensive for many applications.
With the arrival of the age of the semiconductor and solid-state technology, solid-state devices have been devised to replace the vidicon tube for use as image sensors. Solid-state image sensors employing photodiode arrays, charged coupled devices and charge-injection devices are all now known. These techniques employ a silicon semiconductor chip operating according to the so-called photoelectric effect for reproducing light images impinging upon the chip. These solid state imagers are able to reproduce an image with good quality and high resolution at a fraction of the weight and area of a vidicon tube with "solid state" reliability. A general description of such solid-state image sensors and their expected applications is found in FORTUNE, Aug. 10, 1981, pages 161-164.
However, there are many low cost applications for image sensors which remain not withstanding the development of the described solid-state image sensors. In some applications high resolution is unnecessary, and the present day solid state image sensors which are designed to provide such resolution are unacceptably expensive for many consumer applications. Resolution is helpful for position and area measurement and display acuity.
As the described solid-state techniques of charged coupled devices, charge injection devices, and photodiodes were developing, other semiconductor fields also were developing. One such field is the integrated circuit field in general and the integrated circuit memory field in particular. The field of integrated circuit memories has become particularly well developed because of the relatively high unit and total dollar volume. The enormous growth of computer memories has been a primary motivation for the continued refinement and development of semiconductor memories.
One such type of semiconductor memory which is known by those in the art to be light sensitive is the so-called dynamic random access memory (hereinafter dynamic RAM). Dynamic RAMs are generally characterized as employing an array of memory cells, each memory cell having a storage capacitor and access transistor. The array of storage cells are fabricated on semiconductor chips of various, evolving bit densities, such as 1K, 4K, 16K, and more recently 64K or 65,536 bits per chip. The architecture of these chips to achieve, for example, the 64K by 1 product varies from a 2 array to an 8 array characterized by the number of blocks of contiguous memory cells accurately positioned in matrices. Each of the memory cells has a storage capacitor which is light sensitive, the 2 array offers the greatest contiguous number of elements or possible resolution.
Each memory cell may be randomly accessed by, for example, 16 address bits furnished to the chip by the user. Each memory cell must be refreshed by accessing it at least every prescribed interval of time, for example 2 milliseconds, to assure that the memory capacitor has not excessively leaked away charge which determines the state of the memory cell. The predominant leakage mechanism is diffusion current to substrate. This current is composed of so-called dark current, such as generation-recombination current, in the space charge region across the PN junction normally present in forming the memory capacitor. Additionally, photo current which is proportional to the light impinging on the cell capacitor diffusion area is also present. Both of these currents combine to discharge the cell from a charged (i.e. logic 1) level to a discharged or logic 0 level. Because of this gradual decay of the charge level in the memory capacitor, the memory must be refreshed periodically to assure the integrity of the data in the memory cell.
This refreshing action characterizes dynamic RAMs in that each cell must be refreshed periodically; i.e. the true contents of the given memory capacitors must be written back into the respective memory capacitors to recharge the cell.
The magnitude of the photocurrent is proportional to light impinging on the cell capacitors. Thus, if the amount of light varies, the photocurrent varies and performance of the dynamic RAM becomes less predictable. Accordingly the characteristic that dynamic RAMs are light sensitive has heretofore been considered to be a negative or adverse characteristic. Semiconductor manufacturers customarily take precautions to restrict the amount of light impinging upon the memory cell to minimize this photocurrent. For example, during wafer probe testing of the dynamic RAM, a black cloth is customarily placed around the test equipment to shield light from the device under test. Thereafter, the dynamic RAM chips which pass the testing requirements are packaged in light-tight, opaque black packages.
Many prior dynamic RAM chips employed sense amplifiers which utilized a so-called dummy cell. The dummy cell typically took the form of a replica of one of the memory cells or a portion thereof, such as one-half a memory cell. Because such a dummy cell was used in generating a threshold to a sense amplifier which sensed the charge level of the memory cell against a threshold, the sense amplifier/threshold generator circuitry also was light sensitive. Thus, the light image impinging on the random access memory system would not only alter the data states of the memory cells, but would also alter functioning of the sense amplifier/threshold generator.
Improvements in high density random access memory systems were made. One such improvement eliminated the so-called dummy cell in the threshold generator/sense amplifier. This improvement used a dynamic/active/restore sense amplifier employing the so-called mid-point digit line. This technique is generally described in Foss, "Dynamic Memories," ISSCC Digests of Technical Papers, pages 140-141, 1979. Also, such advances are shown in pending patent application Ser. No. 179,581, entitled Dynamic Random Access Memory, filed on Aug. 21, 1980, in the names of Dennis R. Wilson and Robert J. Proebsting, now U.S. Pat. No. 4,397,002, issued Aug. 2, 1983, and in U.S. Pat. No. 4,291,392 entitled Timing of Active Pullup For Dynamic Semiconductor Memory, issued Sept. 22, 1981 to Robert J. Proebsting which is hereby incorporated by reference.
Historically, in the manufacture of dynamic RAMs, numerous chips which are only partially defective result from the sophisticated manufacturing process. Partially defective chips are those having a less than prescribed number of acceptably functioning memory cells in a given array. These partially defective (or conversely partially good) chips presently are either discarded or sold at considerably reduced prices.